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【影视】 Learn SystemVerilog Assertions and Coverage Coding in-depth
收录时间:2017-05-22 文档个数:26 文档大小:781.2 MB 最近下载:2025-05-16 人气:6559 磁力链接
  • mp41_-_Welcome_and_Overview/1_-_Introduction_and_Overview.mp4 7.1 MB
  • mp45_-_Course_Wrap_up_and_Summary/27_-_Summary_and_Wrap_up.mp4 32.9 MB
  • mp44_-_System_Verilog_Functional_Coverage_Coding/25_-_SV_Functoinal_Coverage_Lab_Exercises.mp4 15.0 MB
  • mp44_-_System_Verilog_Functional_Coverage_Coding/24_-_Coverage_Methods_Performance_cover_properties_and_misc.mp4 39.3 MB
  • mp44_-_System_Verilog_Functional_Coverage_Coding/21_-_Coverage_bins_-_Auto_transition_wildcard_ignore_illegal.mp4 40.2 MB
  • mp44_-_System_Verilog_Functional_Coverage_Coding/23_-_Coverage_options_and_usages.mp4 22.0 MB
  • mp44_-_System_Verilog_Functional_Coverage_Coding/20_-_SV_Covergroups_and_Coverpoints_-_Basics.mp4 39.8 MB
  • mp44_-_System_Verilog_Functional_Coverage_Coding/19_-_Introduction_to_Coverage.mp4 32.0 MB
  • mp44_-_System_Verilog_Functional_Coverage_Coding/22_-_SV_Cross_Coverage.mp4 41.9 MB
  • mp42_-_System_Verilog_Assertions_-_Basics_and_Sequences/9_-_Sequences_-_Local_Variables_and_Subroutines.mp4 32.8 MB
  • mp42_-_System_Verilog_Assertions_-_Basics_and_Sequences/7_-_SequenceOperators_-FirstMatch_Throughout_and_Within.mp4 30.3 MB
  • mp42_-_System_Verilog_Assertions_-_Basics_and_Sequences/12_-_Sequences_-_Lab_Exercise_1.mp4 20.1 MB
  • mp42_-_System_Verilog_Assertions_-_Basics_and_Sequences/11_-_Sequences_SystemTasks_Functions.mp4 19.1 MB
  • mp42_-_System_Verilog_Assertions_-_Basics_and_Sequences/10_-_Sequences_-_Sampled_Value_Functions.mp4 33.9 MB
  • mp42_-_System_Verilog_Assertions_-_Basics_and_Sequences/2_-_Introduction_to_Assertions.mp4 29.4 MB
  • mp42_-_System_Verilog_Assertions_-_Basics_and_Sequences/3_-_SVA_Basics_-_Immediate_and_Concurrent_Assertions.mp4 38.3 MB
  • mp42_-_System_Verilog_Assertions_-_Basics_and_Sequences/6_-_SequenceOperators_-_AND_OR.mp4 29.2 MB
  • mp42_-_System_Verilog_Assertions_-_Basics_and_Sequences/5_-_SequenceOperators_-_Repeat_Operators.mp4 27.9 MB
  • mp42_-_System_Verilog_Assertions_-_Basics_and_Sequences/4_-_SVA_Basics_-_Sequence_and_Property_Blocks.mp4 44.0 MB
  • mp42_-_System_Verilog_Assertions_-_Basics_and_Sequences/8_-_SequenceOperators-_if_else_ended_and_triggered.mp4 24.2 MB
【影视】 [ CoursePig.com ] Udemy - SystemVerilog Functional Coverage for Newbie
收录时间:2022-01-31 文档个数:196 文档大小:2.6 GB 最近下载:2025-05-16 人气:2407 磁力链接
  • mp4~Get Your Files Here !/10. Projects/7. 8-bit Counter SystemVerilog TB.mp4 172.2 MB
  • mp4~Get Your Files Here !/9. Transition bins/1. Simple Transition Coverage.mp4 131.2 MB
  • mp4~Get Your Files Here !/10. Projects/3. FIFO Verilog TB.mp4 111.4 MB
  • mp4~Get Your Files Here !/10. Projects/5. Usage of Transition bins Serial Peripheral Interface.mp4 94.8 MB
  • mp4~Get Your Files Here !/8. Cross Coverage/8. Filtering Specific Combination from Cross.mp4 74.7 MB
  • mp4~Get Your Files Here !/8. Cross Coverage/2. Used Case I.mp4 66.6 MB
  • mp4~Get Your Files Here !/2. Getting Started/4. Understanding Covergroup and Event.mp4 65.9 MB
  • mp4~Get Your Files Here !/6. Sample Methods/9. User defined Sample method inside Property block.mp4 65.2 MB
  • mp4~Get Your Files Here !/3. Getting started with bins/7. Size of automatic bins.mp4 62.3 MB
  • mp4~Get Your Files Here !/5. Reusable Covergroup/4. Pass by reference.mp4 57.3 MB
  • mp4~Get Your Files Here !/3. Getting started with bins/2. Fundamentals.mp4 53.4 MB
  • mp4~Get Your Files Here !/9. Transition bins/7. Summary.mp4 52.6 MB
  • mp4~Get Your Files Here !/9. Transition bins/3. Consecutive Repetition Transition.mp4 49.2 MB
  • mp4~Get Your Files Here !/2. Getting Started/6. Understanding option.per_instance.mp4 48.6 MB
  • mp4~Get Your Files Here !/5. Reusable Covergroup/8. Used Case I.mp4 46.9 MB
  • mp4~Get Your Files Here !/3. Getting started with bins/22. Used Case Working with Simple FSM in Verilog.mp4 46.1 MB
  • mp4~Get Your Files Here !/3. Getting started with bins/14. Demonstration.mp4 45.6 MB
  • mp4~Get Your Files Here !/5. Reusable Covergroup/6. Things to remember while working with Generic Covergroup.mp4 45.5 MB
  • mp4~Get Your Files Here !/1. IDE and Motivation/2. Motivation 2 Knowing all the Transitions are Covered by SPI.mp4 42.2 MB
  • mp4~Get Your Files Here !/6. Sample Methods/7. User define Sample Method inside function block.mp4 40.3 MB
【其他】 SystemVerilog Design Start Programming Your Own ICs in HDL
收录时间:2017-02-24 文档个数:3 文档大小:566.4 MB 最近下载:2025-05-15 人气:4738 磁力链接
  • tgzSystemVerilog Design Start Programming Your Own.tgz 566.4 MB
  • txtTorrent downloaded from demonoid.pw.txt 46 Bytes
  • txtTorrent Downloaded From ExtraTorrent.cc.txt 352 Bytes
【压缩文件】 SystemVerilog Beginner Write Your First Design &TB Modules
收录时间:2021-03-14 文档个数:4 文档大小:470.0 MB 最近下载:2025-05-15 人气:961 磁力链接
  • zipSystemVerilog Beginner Write Your First Design &TB Modules.zip 470.0 MB
  • urlDownload more courses.url 123 Bytes
  • txtDownloaded from TutsGalaxy.com.txt 73 Bytes
  • txtTutsGalaxy.com.txt 52 Bytes
【其他】 Udemy.com.SOC.Verification.using.SystemVerilog-BooKWoRM
收录时间:2021-06-27 文档个数:44 文档大小:616.0 MB 最近下载:2025-05-10 人气:477 磁力链接
  • r00bw-udmsocvus.r00 15.0 MB
  • r01bw-udmsocvus.r01 15.0 MB
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  • r15bw-udmsocvus.r15 15.0 MB
  • r16bw-udmsocvus.r16 15.0 MB
  • r17bw-udmsocvus.r17 15.0 MB
  • r18bw-udmsocvus.r18 15.0 MB
  • r19bw-udmsocvus.r19 15.0 MB
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